1. Field of the Invention
This invention relates to electric amplifier circuits, and more particularly to amplifiers employing superbeta transistors.
2. Description of the Prior Art
"Superbeta transistors" are provided with very lightly doped bases or have their emitters driven heavily into their bases in order to achieve high gains, typically in the order of 1,000 -5,000. Amplifiers with superbeta transistors are capable of achieving a higher degree of amplification than would otherwise be attainable. However, the use of such transistors introduces certain control problems that are not present with lower gain transistors. An accurate mechanism to compensate for amplifier input bias currents has been a particular source of concern.
FIG. 1 shows a typical prior art instrumentation amplifier with conventional transistors and a known input current compensation circuit. The amplifier consists of amplifying transistors Q1 and Q2 with inputs 1 and 2 connected respectively to their bases, current sources I1 and I2 providing current respectively to Q1 and Q2, and resistor R connected across the emitters of the two transistors. The transistor emitters are shown connected to a voltage-to-current converter 4, while their collector outputs may be connected to a second amplifier stage. The base currents of Q1 and Q2 introduce undesirable amplifier input currents. In order to provide a compensation current which eliminates the effects of the input bias currents, an additional transistor Q3 identical to Q1 and Q2 is provided. A current source I3, which is equal to both I1 and I2, is connected to the emitter of Q3 so that the current through Q3 will be approximately equal to that through Q1 and Q2, with the collector of Q3 connected to a positive voltage bus.
The base of Q3 is connected to a current mirror consisting of common base connected transistors Q4, Q5 and Q6. Q6 is diode-connected to provide the basecurrent of Q3, while Q4 and Q5 are respectively connected to inputs 1 and 2. Since Q1, Q2 and Q3 are matched and operate at substantially the same emitter currents, their base currents are approximately equal. The base current of Q3 is reflected back through the current mirror and is combined with the base currents of Q1 and Q2. The result is an approximate cancellation of input currents.
The circuit of FIG. 1 contains undesirable "slow discharge" node. Also, a problem can arise if Q1 and Q2 are replaced by superbeta transistors, since the collector breakdown of such devices is only a few volts. A prior art circuit which attempts to solve this problem is shown in FIG. 2. This circuit is an extension of one employed in the OP-27 operational amplifier produced by Precision Monolithics, Inc. of Santa clara, Calif., the assignee of this application. The circuit substantially overcomes the collector breakdown problem of amplifier transistors Q1 and Q2 noted above by the addition of voltage limiting transistor circuits Q7, Q8, Q9, and Q10, Q11, Q12 connected across the collector-emitter circuits of Q1 and Q2, respectively. Q8 and Q11 are respectively connected in series with Q1 and Q2 and their respective current sources I1 and I2. The other transistors in the voltage limiting circuits are connected to add two base-emitter drops between the bases of Q8 and Q11 and the emitters of Q1 and Q2, respectively. A second set of current sources I4 and I5 respectively supply current to the bases of Q8 and Q11 and to the remainder of the voltage limited circuitry, thereby maintaining the collector-base voltages of Q1 and Q2 at close to zero volts.
A pair of compensation transistors Q13 and Q14 perform a function comparable to that of Q3 in FIG. 1. The bases of Q13 and Q14 are connected in common and, when current is drawn through these compensation transistors by emitter connected current sources I6 and I7, the magnitudes of which are equal to I1 and I2, a bias current flows into Q13 and Q14 to compensate for the input base current of Q1 and Q2. A control transistor Q15 is connected with its collector-emitter circuit between the bases of Q13, Q14 and Q6 of the current mirror to control the base potentials of Q13 and Q14.
An output for a second amplifier stage is provided from transistors Q16 and Q17 which have their collectors connected together, their bases connected respectively to the outputs of I1 And I2, and their emitters connected to the collectors of Q13 and Q14 through transistors Q18 and Q19, respectively. The latter two transistors have a common base connection and maintain the collector-base voltages of Q13 and Q14 close to zero volts, as the voltage limiting circuits described above do for Q1 and Q2. The circuit of FIG. 2 has been found to resolve the collectors breakdown problem. However, difficulties have been encountered in making the circuit work accurately because the very low Early voltage of the superbeta transistors (defined as output impedance x collector current) causes the base current to vary significantly with changes in collector-base voltge. In theory this could be overcome by adjusting the potential between the biases for Q15 and Q18, Q19 until the collector-base voltages of Q13 and Q14 match those of Q1 and Q2. In practice, however, this is quite difficult to accompolish because the optimum bias voltage is a function of the Q15 base-emitter voltage, which is poorly defined since the base currents of Q13 and Q14 are not precisely known. The low initial Early voltage of the superbeta transistors thus introduces errors in the input current compensation. It is the circuit of FIG. 1 which has this problem.